NVMTS 2026 will be held at the Takeda Hall (5th Floor, Takeda Building), The University of Tokyo.
Located within the Hongo district of The University of Tokyo, the Takeda Building serves as a sophisticated hub for cutting-edge research and international academic exchange. It is home to the Takeda Hall, a premier facility equipped with modern amenities designed to foster innovation and collaboration among the global semiconductor and memory technology communities.